A4-stage instruction pipeline for instruction execution makes at-speed test possible.A4-stage instruction pipeline for instruction execution makes at-speed test possible.
设计了有利于线程优先级调度的译码段,考虑了共享流水线资源利用率的指令发射逻辑和改进的直接存储访问和便签式存储器接口。
In the instruction execution pipeline stage, scalable pipeline technology was adopted to realize theIn the instruction execution pipeline stage, scalable pipeline technology was adopted to realize the
为有效实现扩展指令,处理器执行级采用了可扩展流水级技术。
In the instruction execution pipeline stage, scalable pipeline technology was adopted to realize theIn the instruction execution pipeline stage, scalable pipeline technology was adopted to realize the
为有效实现扩展指令,处理器执行级采用了可扩展流水级技术。